FET's at the Frontier:
Physics, Limits, and Options

Professor Mark Lundstrom
Electrical and Computer Engineering
Purdue University West Lafayette, Indiana

January 28, 2002, 11:00 am
CISX Auditorium, Center for Integrated Systems, Stanford University

ABSTRACT
As the critical dimensions of silicon transistors shrink to the 10nm scale, scaling limits need to be clarified, and devices that might augment or even replace the MOSFET should be explored. In this talk, I will present a simple view of the physics of nanoscale transistors, one that applies to long channel MOSFETs, 10nm scale MOSFETs, as well as to new types of transistors such as the carbon nanotube FET. The talk will begin with theory of the ballistic MOSFET, which clarifies the essential physics of nanotransistors and establishes theoretical performance limits. The role of scattering, which limits the performance of actual devices will then be examined using a transmission theory similar to that used for conduction in mesoscopic and molecular scale structures. Transmission theory produces simple (Spice level) expressions for the I-V characteristics in terms of a channel transmission coefficient. The approach provides new insights into the physics of nanoscale MOSFETs and serves as a jumping off point for exploring new devices. To explore silicon MOSFET's near the scaling limit, quantum scale simulations of the double gate MOSFET using the nonequilibrium Green's function (NEGF) approach will presented. (The NEGF method can be viewed as a numerical technique to rigorously computed the transistor's transmission coefficient.) Finally, I will examine two alternative approaches that may extend transistor scaling, the Schottky barrier MOSFET and the carbon nanotube FET.

SHORT BIO
Mark Lundstrom is Professor of Electrical and Computer Engineering at Purdue University where he has also served as Assistant Dean of Engineering and Director of the Optoelectronics Research Center. His bachelors and masters degrees are from the University of Minnesota and his Ph.D. from Purdue University. Before joining Purdue, he worked at Hewlett-Packard Corporation on integrated circuit process development and manufacturing. His teaching and research center on the physics, technology, and simulation of nanoscale electronic devices. Lundstrom is a Fellow of the IEEE and the APS, and his work has been recognized by the ASEE Terman Award and, with his colleague, Supriyo Datta, the IEEE Cledo Brunetti Award.

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