Intel Day

Intel Corporation presents

Moore's Law and Logic Technology Development

By Paul Packan, Ph.D. 1991

CISX 101
1:00 - 3:00, August 23, 2004
Refreshments served

Gordon Moore, now Chairman Emeritus of Intel Corporation, predicted in 1965 that the number of transistors on a chip would double every couple of years.

In the 38 years since the introduction of "Moore's Law", there have been two constants:

predictions that the end of Moore's Law is just around the corner, and
the semiconductor industry proving those predictions wrong by producing ever smaller transistors.

While this success has produced faster chips at a lower cost, semiconductor manufacturing has followed another cost reduction trend and has doubled the area of the underlying silicon wafers every decade. The convergence of silicon nanotechnology with 300mm manufacturing has created unique challenges and opportunities. This presentation will review how Intel is approaching the opportunities and the challenges.

Paul Packan received his Ph.D. in electrical engineering from Stanford University in 1991 in the area of process modeling. After graduation, he joined Siemens A.G. in Munich Germany as a guest scientist working on high speed bipolar transistor design. In 1992, he joined Intel Corporation working on MOS transistor technology development. After working on 4 generations of Intel technologies and managing the process and device modeling group, he began working in the area of compact device modeling for circuit design where he has been managing for the past 2 years. He has authored or co-authored more than 20 papers and has been issued 8 patents in the area of transistor architecture.

Intel's College Relations staff, led by Craig Walker, Intel's Stanford Team Leader, will be available to answer questions about Intel jobs. Resumes accepted.