Faculty: Bruce
Wooley
Students: Adrian Ong
Bandpass A/D Conversion for Wireless Applications, Ph.D. Dissertation, Stanford University, September 1998.
There is broad interest in A/D conversion at the intermediate frequency (IF) stage of a radio because the early front-end conversion to digital results in a more designable and testable system. Traditional analog signal processing such as I and Q separation and channel-select filtering can be moved into the digital domain, thereby avoiding the sensitivity of this process to various analog circuit impairments. Furthermore, a digital demodulation of the signal allows the receiver to easily adapt to the multiplicity of standards that proliferate in the emerging wireless market. Unfortunately, as analog processing is eliminated, the signal that must be digitized prior to digital processing has larger dynamic range, and the converter must operate at a higher sampling speed. Analog to digital converters presently have insufficient dynamic range or consume too much power for these applications.
The objective of this research program is to demonstrate an analog to digital converter with sufficient dynamic range (>70 dB) and low enough power consumption (<100 mW) for use in portable radios. The research is focused on an oversampled bandpass delta-sigma modulator based converter.
An oversampled converter was the clear choice, as these are the only type of converters that can obtain the large dynamic range necessary for wireless applications without requiring trimming or other steps incompatible with a low-cost CMOS process. Bandpass converters have several advantages. In this case, the converter digitizes a 200 kHz bandwidth signal centered at 20 MHz. Compared to digitizing a baseband signal, this eliminates several analog signal processing steps, saving circuitry and power. If the signal had been digitized at baseband, two converters, one for the I channel and one for the Q channel, would have been required. Digitizing at an IF frequency also avoids problems with dc offsets and low frequency noise (1/f noise).
A new high-speed, two-path modulator architecture has been developed that relaxes the stringent requirements imposed upon the analog circuits as the sampling frequency of the modulator is increased. By interleaving two highpass modulators, a 200 kHz bandwidth signal centered at 20 MHz can be digitized with an effective oversampling ratio of 200. However, due to path mismatch, spurious mirror signals are introduced into the signal passband and these image signals cannot be suppressed by filtering, only by improving the matching between the two paths. An experimental prototype of a fourth-order, fs/4 modulator has been implemented in a 0.6-um, single-poly, triple-metal CMOS technology. Operating at an effective sampling speed of 80 MHz, the prototype modulator digitizes a 200 kHz signal centered at 20 MHz with 75 dB of dynamic range. The spurious image is suppressed by 42 dB with respect to the input signal.
Adrian Ong received the B.S. degree in electrical engineering from the University of California at Berkeley in 1992 and the M.S. and Ph.D. degrees in electrical engineering from Stanford University in 1993 and 1998.
During the summers of 1990-1993, he worked at Lawrence Livermore National Laboratory, Livermore, CA, designing programmable digital delay lines and oscillators. In the summer of 1994, under the auspices of the National Science Foundation Summer Institute in Japan, he interned at Toshiba Corporation in Kawasaki, Japan, where he designed clock drivers for memories. Since 1998, he has been a Member of Technical Staff in the Silicon Circuits Research Department, which is in the Physical Sciences Research division of Bell Laboratories, Lucent Technologies. His current interests include the design of mixed-signal integrated circuits for data conversion and broadband communications applications. He was a co-recipient of the Beatrice Winner Award for Editorial Excellence at the 1997 International Solid-State Circuits Conference.
Last updated: 3/23/99
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