The scaling of CMOS technology makes it possible for complex digital signal process to consume less power, operate at higher frequency, and occupy less silicon area. However, the design of high-speed, high-resolution ADCs, which is demanded by complex digital systems, is becoming more difficult due to reduced supply voltage and worsening device matching.
The resolution of Nyquist-rate A/D converters is typically limited to 10 to 12 bits by circuit nonlinearities and device mismatch in scaled CMOS technology, even if complex digital calibration is used. In contrast, oversampling A/D converters based on sigma-delta modulation can achieve significantly higher resolution by oversampling the input signal and shaping the quantization noise so as suppress quantization error in the signal band.
The objective of this research is to explore low-power design techniques for both analog and digital circuits in a low-voltage environment. A newly proposed feedforward architecture for a cascade of two second-order sigma-delta modulators offers the potential for low-power, low-voltage operation at signal bandwidths of several MHz. Low-voltage operational amplifiers, multi-bit coarse A/D conversion for quantization, and feedback DAC linearization can then be used to achieve more than 15-bit resolution even from supply voltages as low as 1 V or less.
Integrated Circuits Lab
Center for Integrated Systems
Stanford University