Substrate Noise in Mixed-Signal Integrated Circuits

Faculty: Bruce Wooley
Students: Min Xu

With the continued scaling of CMOS technology, mixed-signal integrated circuits are becoming ubiquitous in the semiconductor industry. Owing to various parasitic coupling mechanisms there is a possibility of transients in the digital circuitry corrupting low-level analog signals and seriously compromising the achieveable performance. For example, recent progress in the design of analog CMOS circuits for portable wireless communications suggests the possibility of integrating an entire radio receiver on a single die. However, to accomplish this it must be possible to ensure that noise generated in the digital signal processing circuits for such a receiver does not couple into the RF signal at the front end.

It is the objective of the research to identify and model the mechanisms by which transients in digital circuits can couple into precision analog circuits integrated in the same die. The principal vehicles for this study are CMOS RF circuits typcial of those required to implement the front end of a wireless receiver and circuits that are typical of those used for broadband A/D conversion.

A major focus of this project is the development of an analytic model for substrate coupling that is feasible for use in mixed-signal IC design. It is intended that the model be able to quantitatively predict both the level of noise injected into the substrate by a large digital circuit and the effect of this noise on the performance of analog circuit blocks integrated in the same substrate. Initially, we propose to study the impact of substrate noise coupling on the performance of a low-power single-chip GPS receiver. In this receiver it is feared that the digital circuits used for timing recovery and signal processing will degrade the performance of analog blocks such as the low-noise amplifier, mixer, filter, phase locked loop and IF amplifier.

Integrated Circuits Lab